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NB4L52_07参数引脚封装等应用资料

NB4L52_07 Datasheet PDF

生产商封装功能应用PDF适应温度
ONSEMI[ON Semiconductor] V/3.3 V/5.0 Differential Data/Clock Flip-Flop with Reset Multi-Level Inputs LVPECL Translator Internal Termination NB4L52_07 PDF
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  • Semiconductor NB4L52
    5.5V D-Flip-flop w/Diff Reset Input Terms
  • ONSEMI[ON Semiconductor] NB4L5207
    V/3.3 V/5.0 Differential Data/Clock Flip-Flop with Reset Multi-Level Inputs LVPECL Translator Internal Termination
  • Semiconductor NB4L52MNG
    V/3.3 V/5.0 Differential Data/Clock Flip-Flop with Reset Multi-Level Inputs LVPECL Translator Internal Termination
  • NB4L52MNR2G
    V/3.3 V/5.0 Differential Data/Clock Flip-Flop with Reset Multi-Level Inputs LVPECL Translator Internal Termination
  • ON Semiconductor NB4L52_07
    2.5 V/3.3 V/5.0 V Differential Data/Clock D Flip-Flop with Reset Multi-Level Inputs to LVPECL Translator w/ Internal Termination

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